Computationally efficient low-power sigma delta modulation-based image processing algorithm

Aneela Pathan; Tayab D Memon; Saleem Raza Memon; Rizwan Aziz Mangi

doi:10.22581/muet1982.2303.11

Aneela Pathan Department of Electronic Engineering, Quaid-e-Awam University of Engineering, Science, and Technology Campus Larkana Pakistan
Tayab D Memon Department of Electronic Engineering, Mehran University of Engineering and Technology, Jamshoro Pakistan
Saleem Raza Memon Centre for Artificial Intelligence Research and Optimization Design and Creative Technology Vertical, Torrens University, Melbourne Australia
Rizwan Aziz Mangi Department of Electronic Engineering, Quaid-e-Awam University of Engineering, Science, and Technology Campus Larkana Pakistan

DOI: https://doi.org/10.22581/muet1982.2303.11

Abstract

Digital Image Processing has dominated Digital Signal Processing at the cost of more memory, resources, and high computational power. In image processing, filtering transformations and other operations need complex multiplications, and the multiplier is one of the most resources consuming elements. Recently, mitigating the multiplier complexity in the digital signal processing (DSP) algorithms sigma-delta modulation based general purpose and adaptive DSP algorithms are developed in MATLAB and compared with its counterpart multi-bit algorithms for functionality and area-performance-power in FPGA. The contemporary multiplier algorithms are also optimized to overcome the multiplier complexity challenge as computation becomes simple and fast. This paper extends the reported work by investigating the sigma-delta modulation approaches for developing a computationally efficient low-power image processing algorithm. The proposed model is designed, developed, and simulated in MATLAB. The simulation results are analyzed using SNR, MSE, and Peak SNR. The simulation results show that the proposed system can better mitigate the noise effect, making it robust for noisy environment.