Realizing Ternary Logic in FPGAs for SWL DSP Systems
Keywords: Ternary Adder, Single-Bit DSP System, Sigma Delta Modulation, VHDL
Mehran University Research Journal of Engineering & Technology
Volume 32 , Issue 3
TAYAB DIN MEMON , IRFAN AHMED HALEPOTO , AHMED AL-OTABI ,
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