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Cache Memory: An Analysis on Replacement Algorithms and Optimization Techniques

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Mehran University Research Journal of Engineering & Technology

Volume 36 ,  Issue 4

QAISAR   JAVAID , AYESHA ZAFAR   , MUHAMMAD AWAIS   , MUNAM ALI SHAH   ,

References
1. Gagged, G., Paresh, R., and Madarkar, J., "Survey on Hardware Based Advanced Technique for Cache Optimization for RISC Based System Architecture", International Journal of Advanced Research in Computer Science and Software Engineering, Volume 3, No. 9, pp. 156-160, 2013.
2. Patidar, K., "A Taxonomy of Cache Replacement Algorithms",International Journal of New Technologies in Science & Engineering, Volume 2, No. 3, pp. 98-108, 2015.
3. Khatoon, H., Mirza, S.H., and Altaf, T., "Operating System-Aware Cache Optimization Techniques for Multi Core Processors", Proceedings of International Conference on Frontiers of Information Technology (FIT), pp. 99-105, 2011
4. Psounis, K., Prabhakar, B., and Science, C., "A Randomized Web-Cache Replacement Scheme", Proceedings of IEEE 20th Annual Joint Conference on Computer and Communications Societies, Volume 3, pp. 1407-1415, 2001
5. Kowarschik, M., and Wei, B.C., "An Overview of Cache Optimization Techniques and Cache-Aware Numerical Algorithms", Algorithms for Memory Hierarchies, Springer Berlin Heidelberg, pp.213-232, 2003.
6. Ahmed, M.W., andShah, M.A., "Cache Memory: An Analysis on Optimization Techniques", International Journal of Computer and IT, Volume 4, No. 2, pp. 414-418, 2015.
7. Butt, A.R., Gniady, C., and Hu, Y.C.,"The Performance Impact of Kernel Prefetching on Buffer Cache Replacement Algorithm", IEEE Transactions on Computers, Volume 56, No. 7, pp. 889–908, 2007.
8. Swain, D., "Paikaray, B., and Swain, D., AWRP:Adaptive Weight Ranking Policy", arXiv Preprint arXiv, Volume 3, No. 2, pp. 1107,4851, 2011
9. Podlipnig, S., and Böszörmenyi, L., "A Survey of Web Cache Replacement Strategies",ACM Computing Surveys, Volume 35, No. 4, pp. 374-398, 2003.
10. Chavan, A.S., Nayak, K.R., Vora, K.D., Purohit, M.D., and Chawan, P.M., "A Comparison of Page Replacement Algorithms", International Journal of Engineering and Technology, Volume3, No. 2, pp. 171-174, 2011.
11. Bansal,S.,and Modha,D.S.,"CAR: Clock with Adaptive Replacement", Proceedings of 3rd USENIX Conference on File and Storage Technologies, Volume 4, pp. 187-200, 2004.
12. Megiddo, N.,and Modha, D.S., "Outperforming LRU with an Adaptive Replacement Cache Algorithm", Computer, Volume 37, No. 4, pp. 58-65, 2004.
13. Megiddo,N., Modha, D.S., and Jose, S., "A Simple Adaptive Cache Algorithm Outperforms LRU", IBM Research Report, Computer Science, 2003
14. Butt, A.R.,Gniady, C., and Hu, Y.C., "The Performance Impact of Kernel Prefetching on Buffer Cache Replacement Algorithms", ACM SIGMETRICS Performance Evaluation Review, Volume 37, No. 1, pp. 157-168, 2005.
15. Janapsatya, A., Ignjatoviæ, A., Peddersen, J., and Parameswaran, S., "Dueling CLOCK: Adaptive Cache Replacement Policy Based on The CLOCK Algorithm", Proceedings of Conference on Design, Automation and Test in Europe, pp. 920-925, 2010.
16. Bhattacharjee, A., and Debnath, B.K., "A New Web Cache Replacement Algorithm", Proceedings of IEEE Conference on Pacific Rim Conference on Communications, Computers and Signal Processing, pp. 420-423, 2005
17. Gao, H., and Wilkerson, C., "A Dueling Segmented LRU Replacement Algorithm with Adaptive Bypassing", 1st JILP Worshop on Computer Architecture Competitions: Cache Replacement Championship, 2010
18. Morales, K.,and Lee, B.K., "Fixed Segmented LRU Cache Replacement Scheme with Selective Caching", IEEE Proceedings of 31st International Conference on Performance Computing and Communications, pp. 199-200, 2012
19. Abdel F.A., and Samra, A.A., "Least Recently Plus Five Least Frequently Replacement Policy (LR+5LF )", International Arabic Journal of Information Technology, Volume 9, No. 1, pp. 16-21, 2012.
20. Wang, Q., "WLRU CPU Cache Replacement Algorithm", Doctoral Dissertation, The University of Western Ontario London, 2006.
21. Ding, X., Wang, K., and Zhang, X, "ULCC: A User- Level Facility for Optimizing Shared Cache Performance on Multicores", ACM Sigplan Notices, Volume 46, No. 8, pp. 103-112, 2011.
22. Sandberg, A., Eklöv, D., and Hagersten, E., "Reducing Cache Pollution Through Detection and Elimination of Non-Temporal Memory Accesses", Proceedings of IEEE Conference on High Performance Computing, Networking, Storage and Analysis, pp. 1-11, 2010
23. Ishizaka, K., Obata, M., and Kasahara, H, "Cache Optimization for Coarse Grain Task Parallel Processing Using Inter-Array Padding", International Workshop on Languages and Compilers for Parallel Computing. Springer Berlin Heidelberg, pp. 64-76, 2003.
24. Beckmann, N., and Sanchez,D, "Jigsaw: Scalable Software-Defined Caches", Proceedings of IEEE 22nd International Conference on Parallel Architectures and Compilation Techniques, pp. 213–224, 2013.
25. Kim, C., Burger, D., and Keckler, S.W., "An Adaptive, Non-Uniform Cache Structure for Wire-Delay Dominated On-Chip Caches", ACM Sigplan Notices, Volume 37, No. 10, pp.211–222, 2002.
26. Wang, Z., McKinley, K.S., Rosenberg, A.L., and Weems, C.C., "Using the Compiler to Improve Cache Replacement Decisions", Proceedings of IEEE International Conference on Parallel Architectures and Compilation Techniques, pp. 199-208, 2002.
27. Calder, B., Grunwald, D., and Emer, J.,"Predictive Sequential Associative Cache", Proceedings of IEEE 2nd International Symposium on High-Performance Computer Architecture, pp. 244-253, 1996.
28. VanderWiel, S., and Lilja, D.J., "A Survey of Data Prefetching Techniques", Proceedings of the 23rd International Symposium on Computer Architecture, 1996.
29. Huang, C.C., and Nagarajan, V., "Increasing Cache Capacity via Critical-Words-Only Cache", Proceedings of IEEE 32nd International Conference on Computer Design (ICCD), pp. 125-132, 2014.
30. Sawant, R., Ramaprasad, B.H., Govindwar, S., and Mothe, N., "Memory Hierarchies-Basic Design and Optimization Techniques Survey on Memory Hierarchies – Basic Design and Cache Optimization Techniques", 2010.
31. Agarwal, A., and Pudar, S.D., "Column-Associative Caches: Caches A Technique for Reducing the Miss Rate of Direct-Mapped", ACM, Volume 21, No. 2, pp. 179-190, 1993
32. Batson, B., and Vijaykumar, T.N., "Reactive-Associative Caches", Proceedings of IEEE International Conference on Parallel Architectures and Compilation Techniques, pp. 49-60, 2001.
33. Stiliadis, D., and Varma, A., "Selective Victim Caching: A Method to Improve the Performance of Direct-Mapped Caches", IEEE Transactions on Computers, Volume 46, No. 5, pp. 603–610, 1997
34. Bershad, B.N., Lee, D., Romer, T.H., and Chen, J.B., "Avoiding Conflict Misses Dynamically in Large Direct- Mapped Caches", ACM SIGPLAN Notices, Volume 29, No. 11, pp. 158-170, 1994.
35. Ramaswamy, S., and Yalamanchili, S., "Improving Cache Efficiency via Resizing + Remapping", Proceedings of IEEE 25th International Conference on Computer Design (ICCD), pp. 47–54, 2007.
   


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